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I²C and SPI

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The I²C bus

The I²C bus is a multi-node bus. Nodes can have – at a given time – either a master or a slave role. On the one hand, a master node generates the clock and initiates communication with slaves. On the other hand, a slave node receives the clock and responds when addressed by the master.

Although I²C is a multi-master bus (and multiple masters can be present at the same time, or master/slave roles can be swapped at a particular time), you will find mostly the configuration with a ‘stable’ single master and one-or-more slaves. The master can write to and read from slaves; the master is always taking the initiative since it has the clock under its control. It only needs two wires, the Serial Data Line (SDA) and the Serial Clock (SCL). Slaves have an 7-bit or 10-bit address, so they know when to respond to master requests (either read or write).


From a software perspective, it is not important to know exactly which bit is being sent on the bus at any given time. It was important at a time when I²C was implemented by bit-banging GPIO pins on the micro-controllers, or – we must admit – even now when you need to debug the protocol on the scope for example. Nowadays, I²C peripherals take care of the real low level stuff.

The speed or bit rate of the communication varies and can be 10 kbit/s (low speed), arbitrary low speed, 100 kbit/s (standard) or faster speeds (400 kbit/s up to 1mbit/s and higher). For more information and a bit-bang example in pseudo c-source code, check wikipedia.

Advantages of I²C

  • Cost-effectiveness.
  • Simplicity since you need only 2 wires to communicate.
  • Multiple nodes (iow bus).

Disadvantages of  I²C

  • The limitation on the number of addresses (but one should keep the number of member nodes low anyway).
  • Potential faults where one node is able to disable the bus completely.
  • Limited speed and fairness where one devices monopolizes the bus for a longer time period.
  • It is to be used for short distances.

All in all, a simple cost-effective way to connect for example low speed sensors to embedded devices.

The SPI bus

The SPI (Serial Peripheral Interface Bus) is sometimes also referred to as the SSI (Synchronous Serial Interface). It is a single master communication protocol which requires at least 4 signal lines (clock signal, slave select signal, Master Out – Slave In, Master In – Slave Out) for a proper bidirectional master-slave communication. It is further defined by its clock polarity (CPOL) and clock phase (CPHA) properties which together define which edges are used for data sampling and data toggling, and the clock signal idle level. Suffice to remember that both communication nodes need to have the same mode activated in order to properly talk to each other.


Advantages of the SPI bus

  • Full duplex.
  • It can achieve higher speeds than I²C for example in the order of tens of mbits/s, and this with higher throughput and less overhead.
  • The implementation in electronic hardware remains simple: It requires more pins than I²C, but still less than for parallel connections.
  • One can use arbitrary message lengths which need not be word aligned.
  • There is no addressing scheme required since the master selects the slave with the SS# line.

Disadvantages of the SPI bus

  • There is no error checking and communication might be prone to errors, but properly designed signal routing should strongly diminish the chances of that happening.
  • The protocol is also to be used for short distances.

We have seen it used for talking to wireless modules, flash memories, inter-controller communication, etc… things that require higher bidirectional bandwidth but with a dedicated cost-effective physical connection. SPI controllers that can utilize DMA are no exception.

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